CommandLine
C:\Xilinx\10.1\ISE\bin\nt\unwrapped\cpldfit.exe -ise C:/Xilinx/projects/main_zobraz 360/main.ise -intstyle ise -p xc2c256-7-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init low -inputs 32 -pterms 28 -unused keeper -terminate keeper -iostd LVCMOS18 main.ngd
s
FormatString
cpldfit <design[.ngd]> [-p <part>] [-intstyle ise|xflow|silent] [-optimize density|speed] [--tspec_partition] [-nomlopt] [-ignoretspec] [-init low|high|fpga] [-slew fast|slow|auto] [-loc on|off|try] [-log <logfile>] [-wysiwyg] [-keepio] [--opt_xxx] [--opt_yyy] [--opt_zzz] [--xplaopt_verify] [-ofmt abel|vhdl|verilog] [-exhaust] [-inputs <limit:4,40>] [-pterms <limit:3,56>] [-inreg on|off] [--old_speed] [--nobufropt] [-nogclkopt] [-nogsropt] [-nogtsopt] [-ignoredatagate] [-unused ground|pullup|keeper|float|pulldown] [-terminate pullup|keeper|float|pulldown] [-iostd LVTTL|LVCMOS18|LVCMOS18_ANY|LVCMOS25|LVCMOS33|SSTL2_I|SSTL3_I|HSTL_I|LVCMOS15] [-blkfanin <limit:4,40>] [--noopendrain] [--nocxt] [--nomdf] [--noxml] [--neweqn] [--holistic] [--noibis] [--htmlrpt] [--libxslt <limit:-1,10>] [--noselfpinlock] [--readngd_debug] [--write_mapped_network <limit:1,2>] [--write_optimized_network <limit:1,2>] [--write_xpla_jedec] [--skip_syn] [--pin_spread_out] [--xpla_opt <limit:0,1>] [--xpla_debug] [--xstrategy inputs|pterms] [--xinputs <limit:-10,10>] [--xpterms <limit:-10,10>] [--readngd] [--partgen] 
s
